Lenovo 59P5107 Datasheet download pdf (Page 16)

Low Voltage Intel

®

Xeon

™

Processor at 1.60 GHz, 2.0 GHz and 2.4 GHz

16 Datasheet

Figure 1. Typical V

CCIOPLL

, V

CCA

and V

SSA

Power Distribution

Figure 2. Phase Lock Loop (PLL) Filter Requirements

NOTES:

1. Diagram not to scale.

2. No specifications for frequencies beyond f

core

(core frequency).

3. f

peak

, if existent, should be less than 0.05 MHz.

VCC

VCCA

VSSA

VCCIOPLL

L1/L2

L1/L2

C

C

Processor

PLL

R-Socket

R-Trace

R-Socket

R-Socket

R-Trace

Processor interposer "pin"

Baseboard via that connects

filter to VCC plane

Trace

< 0.02 Ω

Socket pin

0 dB

-28 dB

-34 dB

0.2 dB

forbidden

zone

-0.5 dB

forbidden

zone

1 MHz 66 MHz

f

co

re

f

pea

k

1 HzDC

passband

high frequency

band

1 2 ... 11 12 13 14 15 16 17 18 19 20 21 ... 101 102

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